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1 ? icl3224, icl3226, icl3238, ICL3244 1 microamp, +3v to +5.5v, 250kbps, rs-232 transceivers with enhanced automatic powerdown the intersil icl32xx devices are 3.0v to 5.5v powered rs-232 transmitters/receivers which meet ela/tia-232 and v.28/v.24 specifications, even at v cc = 3.0v. targeted applications are pdas, palmtops, and notebook and laptop computers where the low operational, and even lower standby, power consumption is critical. efficient on-chip charge pumps, coupled with manual and enhanced automatic powerdown functions, reduce the standby supply current to a 1 a trickle. small footprint packaging, and the use of small, low value capacitors ensure board space savings as well. data rates greater than 250kbps are guaranteed at worst case load conditions. this family is fully compatible with 3.3v only systems, mixed 3.3v and 5.0v systems, and 5.0v only systems. the ICL3244 is a 3 driver, 5 receiver device that provides a complete serial port suitable for laptop or notebook computers. the ICL3244/38 also include a noninverting always-active receiver for ring indicator monitoring. these devices feature an enhanced automatic powerdown function which powers down the on-chip power- supply and driver circuits. this occurs when all receiver and transmitter inputs detect no signal transitions for a period of 30sec. these devices power back up, automatically, whenever they sense a transition on any transmitter or receiver input. table 1 summarizes the features of the devices represented by this data sheet, while application note an9863 summarizes the features of each device comprising the icl32xx 3v family. features ? 15kv esd protected (human body model) ? manual and enhanced automatic powerdown features ? drop in replacements for max3224, max3226, max3238, max3244 ? meets eia/tia-232 and v.28/v.24 specifications at 3v ? latch-up free ? rs-232 compatible with v cc = 2.7v ? on-chip voltage converters require only four external 0.1 f capacitors ? flow-through pinout (icl3238) ? guaranteed mouse driveability (ICL3244) ? ?ready to transmit? indicator output (icl3224/26) ? receiver hysteresis for improved noise immunity ? guaranteed minimum data rate . . . . . . . . . . . . . 250kbps ? guaranteed minimum slew rate . . . . . . . . . . . . . . . 6v/ s ? wide power supply range . . . . . . . single +3v to +5.5v ? low supply current in powerdown state. . . . . . . . . . .1 a applications ? any system requiring rs-232 communication ports - battery powered, hand-held, and portable equipment - laptop computers, notebooks, palmtops - modems, printers and other peripherals - digital cameras - cellular/mobile phones - data cradles related literature ? technical brief tb363 ?guidelines for handling and processing moisture sensitive surface mount devices (smds)? ? an9863, ?3v to +5.5v, 250k-1mbps, rs-232 transmitters/receivers? table 1. summary of features part number no. of tx. no. of rx. no. of monitor rx. (r outb ) data rate (kbps) rx. enable function? ready output? manual power- down? enhanced automatic powerdown icl3224 2 2 0 250 no yes yes yes icl3226 1 1 0 250 no yes yes yes icl3238 5 3 1 250 no no yes yes ICL3244 3 5 1 250 no no yes yes data sheet november 2002 caution: these devices are sensitive to electrostatic discharge; follow proper ic handling procedures. 1-888-intersil or 321-724-7143 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2002. all rights reserved all other trademarks mentioned are the property of their respective owners. fn4876.6
2 ordering information (note 1) part no. temp. range ( o c) package pkg. no. icl3224ca 0 to 70 20 ld ssop m20.209 icl3224ia -40 to 85 20 ld ssop m20.209 icl3224cp 0 to 70 20 ld pdip e20.3 icl3226ca 0 to 70 16 ld ssop m16.209 icl3226ia -40 to 85 16 ld ssop m16.209 icl3238ca 0 to 70 28 ld ssop m28.209 icl3238ia -40 to 85 28 ld ssop m28.209 ICL3244ca 0 to 70 28 ld ssop m28.209 ICL3244ia -40 to 85 28 ld ssop m28.209 ICL3244cb 0 to 70 28 ld soic m28.3 ICL3244ib -40 to 85 28 ld soic m28.3 ICL3244cv 0 to 70 28 ld tssop m28.173 ICL3244iv -40 to 85 28 ld tssop m28.173 note: 1. most surface mount devices are available on tape and reel; add ?-t? to suffix. ordering information (continued) (note 1) part no. temp. range ( o c) package pkg. no. pinouts icl3224 (pdip, ssop) top view icl3226 (ssop) top view icl3238 (ssop) top view ICL3244 (soic, ssop, tssop) top view ready c1+ v+ c1- c2+ c2- v- t2 out r2 in forceoff gnd t1 out r1 in r1 out t1 in invalid v cc forceon t2 in 20 19 18 17 16 15 14 13 12 11 1 2 3 4 5 6 7 8 9 10 r2 out ready c1+ v+ c1- c2+ c2- v- r1 in forceoff gnd t1 out forceon t1 in r1 out v cc invalid 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 c2+ c2- v- r1 in r2 in r3 in r4 in r5 in t1 out t3 out t3 in t2 in t1 in c1+ v cc gnd c1- forceon invalid r1 out r2 out r3 out r4 out r5 out v+ forceoff r2 outb 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 t2 out c2+ gnd c2- v- t1 out t2 out t3 out r1 in r2 in r3 in t5 out forceon forceoff c1+ v cc c1- t1 in t2 in r1 out t4 in r3 out t5 in r1 outb invalid v+ t3 in r2 out 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 t4 out icl3224, icl3226, icl3238, ICL3244
3 pin descriptions pin function v cc system power supply input (3.0v to 5.5v). v+ internally generated positive transmitter supply (+5.5v). v- internally generated negative transmitter supply (-5.5v). gnd ground connection. c1+ external capacitor (voltage doubler) is connected to this lead. c1- external capacitor (voltage doubler) is connected to this lead. c2+ external capacitor (voltage inverter) is connected to this lead. c2- external capacitor (voltage inverter) is connected to this lead. t in ttl/cmos compatible transmitter inputs. t out rs-232 level (nominally 5.5v) transmitter outputs. r in rs-232 compatible receiver inputs. r out ttl/cmos level receiver outputs. r outb ttl/cmos level, noninverting, always enabled receiver outputs. invalid active low output that indicates if no valid rs -232 levels are present on any receiver input. ready active high output that indicates when the icl32xx is ready to transmit (i.e., v- -4v) forceoff active low to shut down transmitters and on-chip power supply. th is overrides any automatic circuitry and forceon (see table 2) . forceon active high input to override automatic powerdown ci rcuitry thereby keeping transmitters active. (forceoff must be high). typical operating circuits icl3224 icl3226 19 v cc t1 out t2 out t1 in t2 in t 1 t 2 0.1 f + 0.1 f + 0.1 f 13 12 17 8 2 4 3 7 v+ v- c1+ c1- c2+ c2- + 0.1 f 5 6 r1 out r1 in 16 5k ? r2 out r2 in 9 10 5k ? 15 c 1 c 2 + c 3 c 4 ready 1 gnd +3.3v + 0.1 f 18 ttl/cmos logic rs-232 levels r 1 r 2 forceon forceoff 14 20 v cc 11 invalid to power control levels logic 15 v cc t1 out t1 in t 1 0.1 f + 0.1 f + 0.1 f 11 13 2 4 3 7 v+ v- c1+ c1- c2+ c2- + 0.1 f 5 6 r1 out r1 in r 1 8 9 5k ? c 1 c 2 + c 3 c 4 ready 1 gnd +3.3v + 0.1 f 14 ttl/cmos logic rs-232 levels forceon forceoff 12 16 v cc 10 invalid to power control logic levels icl3224, icl3226, icl3238, ICL3244
4 icl3238 notes: 2. the negative terminal of c 3 can be connected to either v cc or gnd. 3. for v cc = 3.15v (3.3v -5%), use c 1 - c 4 = 0.1 f or greater. for v cc = 3.0v (3.3v -10%), use c 1 - c 4 = 0.22 f. ICL3244 typical operating circuits (continued) 26 v cc t1 out t2 out t3 out t1 in t2 in t3 in t 1 t 2 t 3 0.1 f + 0.1 f + 0.1 f 24 23 5 6 22 7 28 25 27 4 v+ v- c1+ c1- c2+ c2- + 0.1 f 1 3 r1 out r1 in 8 5k ? r2 out r2 in 9 20 5k ? r3 out r3 in 11 18 5k ? 21 r1 outb c 1 c 2 + c 3 c 4 forceon forceoff 13 gnd 14 +3.3v + 0.1 f 16 2 v cc ttl/cmos logic rs-232 levels rs-232 levels r 1 r 2 r 3 15 invalid to power control + c 3 (optional t4 out t5 out t4 in t5 in t 3 t 4 19 10 17 12 levels logic connection, note 2) note 3 note 3 26 v cc t1 out t2 out t3 out t1 in t2 in t3 in t 1 t 2 t 3 0.1 f + 0.1 f + 0.1 f 14 13 9 10 12 11 28 24 27 3 v+ v- c1+ c1- c2+ c2- + 0.1 f 1 2 r1 out r1 in 4 5k ? r2 out r2 in 5 18 5k ? r3 out r3 in 6 17 5k ? r4 out r4 in 7 16 5k ? r5 out r5 in r 5 8 15 5k ? 19 r2 outb c 1 c 2 + c 3 c 4 forceon forceoff 23 gnd 22 +3.3v + 0.1 f 20 25 v cc ttl/cmos logic rs-232 levels rs-232 levels r 1 r 2 r 3 r 4 21 invalid to power control logic levels icl3224, icl3226, icl3238, ICL3244
5 absolute maximum rati ngs thermal information v cc to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 6v v+ to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3v to 7v v- to ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +0.3v to -7v v+ to v- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14v input voltages t in , forceoff , forceon . . . . . . . . . . . . . . . . . . -0.3v to 6v r in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25v output voltages t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.2v r out , invalid , ready . . . . . . . . . . . . . . . . -0.3v to v cc +0.3v short circuit duration t out . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous esd rating . . . . . . . . . . . . . . . . . . . . . . . . . see specification table operating conditions temperature range icl32xxc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 o c to 70 o c icl32xxi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 o c to 85 o c thermal resistance (typical, note 4) ja ( o c/w) 20 ld pdip package . . . . . . . . . . . . . . . . . . . . . . . . 80 28 ld soic package . . . . . . . . . . . . . . . . . . . . . . . . 75 16 ld ssop package . . . . . . . . . . . . . . . . . . . . . . . 140 20 ld ssop package . . . . . . . . . . . . . . . . . . . . . . . 125 28 ld ssop and tssop packages . . . . . . . . . . . . 100 moisture sensitivity (see technical brief tb363) all packages not listed below . . . . . . . . . . . . . . . . . . . . . level 1 16 ld ssop package . . . . . . . . . . . . . . . . . . . . . . . . . . . . level 2 maximum junction temperature (plastic package) . . . . . . . 150 o c maximum storage temperature range . . . . . . . . . -65 o c to 150 o c maximum lead temperature (soldering 10s) . . . . . . . . . . . . 300 o c (soic, ssop, tssop - lead tips only) caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. note: 4. ja is measured with the component mounted on a low effective thermal conductivity test board in free air. see tech brief tb379 fo r details. electrical specifications test conditions: v cc = 3v to 5.5v, c 1 - c 4 = 0.1 f (icl3238: c 1 - c 4 = 0.22 f @ v cc = 3v); unless otherwise specified. typicals are at t a = 25 o c parameter test conditions temp ( o c) min typ max units dc characteristics supply current, automatic powerdown all r in open, forceon = gnd, forceoff = v cc 25 - 1.0 10 a supply current, powerdown forceoff = gnd 25 - 1.0 10 a supply current, automatic powerdown disabled all outputs unloaded, forceon = forceoff = v cc ICL3244, v cc = 3v 25 - 0.3 1.0 ma all others, v cc = 3.15v 25 - 0.3 1.0 ma logic and transmitter inputs and receiver outputs input logic threshold low t in , forceon, forceoff full - - 0.8 v input logic threshold high t in , forceon, forceoff v cc = 3.3v full 2.0 - - v v cc = 5.0v full 2.4 - - v transmitter input hysteresis 25 - 0.5 - v input leakage current t in , forceon, forceoff full - 0.01 1.0 a output leakage current forceoff = gnd full - 0.05 10 a output voltage low i out = 1.6ma full - - 0.4 v output voltage high i out = -1.0ma full v cc -0.6 v cc -0.1 - v receiver inputs input voltage range full -25 - 25 v input threshold low v cc = 3.3v 25 0.6 1.2 - v v cc = 5.0v 25 0.8 1.5 - v input threshold high v cc = 3.3v 25 - 1.5 2.4 v v cc = 5.0v 25 - 1.8 2.4 v input hysteresis 25 - 0.5 - v input resistance 25357k ? transmitter outputs output voltage swing all transmitter outputs loaded with 3k ? to ground full 5.0 5.4 - v icl3224, icl3226, icl3238, ICL3244
6 output resistance v cc = v+ = v- = 0v, transmitter output = 2v full 300 10m - ? output short-circuit current full - 35 60 ma output leakage current v out = 12v, v cc = 0v or 3v to 5.5v, automatic powerdown or forceoff = gnd full - - 25 a mouse driveability (ICL3244 only) transmitter output voltage (see figure 11) t1 in = t2 in = gnd, t3 in = v cc , t3 out loaded with 3k ? to gnd, t1 out and t2 out loaded with 2.5ma each full 5- -v enhanced automatic powerdown (forceon = gnd, forceoff = v cc ) receiver input thresholds to invalid high see figure 6 full -2.7 - 2.7 v receiver input thresholds to invalid low see figure 6 full -0.3 - 0.3 v invalid , ready output voltage low i out = 1.6ma full - - 0.4 v invalid , ready output voltage high i out = -1.0ma full v cc -0.6 - - v receiver positive or negative threshold to invalid high delay (t invh ) icl3238 25 - 0.1 - s all others 25 - 1 - s receiver positive or negative threshold to invalid low delay (t invl ) icl3238 25 - 50 - s all others 25 - 30 - s receiver or transmitter edge to transmitters enabled delay (t wu ) icl3238, note 5 25 - 25 - s all others, note 5 25 - 100 - s receiver or transmitter edge to transmitters disabled delay (t autopwdn ) note 5 full153060sec timing characteristics maximum data rate r l = 3k ?, c l = 1000pf, one transmitter switching full 250 500 - kbps receiver propagation delay receiver input to receiver output, c l = 150pf t phl 25 - 0.15 - s t plh 25 - 0.15 - s receiver output enable time normal operation (icl3238/44 only) 25 - 200 - ns receiver output disable time normal operation (icl3238/44 only) 25 - 200 - ns transmitter skew t phl - t plh 25 - 100 - ns receiver skew t phl - t plh 25 - 50 - ns transition region slew rate v cc = 3.3v, r l = 3k ? to 7k ?, measured from 3v to -3v or -3v to 3v c l = 150pf to 1000pf 25 6 - 30 v/ s c l = 150pf to 2500pf 25 4 8 30 v/ s esd performance rs-232 pins (t out , r in ) human body model 25 - 15 - kv iec1000-4-2 contact discharge 25 - 8-kv iec1000-4-2 air gap discharge 25 - 10 - kv all other pins human body model 25 - 2.5 - kv note: 5. an ?edge? is defined as a transition through t he transmitter or receiv er input thresholds. electrical specifications test conditions: v cc = 3v to 5.5v, c 1 - c 4 = 0.1 f (icl3238: c 1 - c 4 = 0.22 f @ v cc = 3v); unless otherwise specified. typicals are at t a = 25 o c (continued) parameter test conditions temp ( o c) min typ max units icl3224, icl3226, icl3238, ICL3244
7 detailed description these icl32xx interface ics operate from a single +3v to +5.5v supply, guarantee a 250kbps minimum data rate, require only four small external 0.1 f capacitors, feature low power consumption, and meet all ela rs-232c and v.28 specifications. the circuit is divided into three sections: the charge pump, the transmitters, and the receivers. charge-pump intersil?s new icl32xx family utilizes regulated on-chip dual charge pumps as voltage doublers, and voltage inverters to generate 5.5v transmitter supplies from a v cc supply as low as 3.0v. this allows these devices to maintain rs-232 compliant output levels over the 10% tolerance range of 3.3v powered systems. the efficient on-chip power supplies require only four small, external 0.1 f capacitors for the voltage doubler and inverter functions at v cc = 3.3v. see the ?capacitor selection? section, and table 3 for capacitor recommendations for other operating conditions. the charge pumps operate discontinuously (i.e., they turn off as soon as the v+ and v- supplies are pumped up to the nominal values), resulting in significant power savings. transmitters the transmitters are proprietary, low dropout, inverting drivers that translate ttl/cmos inputs to eia/tia-232 output levels. coupled with the on-chip 5.5v supplies, these transmitters deliver true rs-232 levels over a wide range of single supply system voltages. transmitter outputs disable and assume a high impedance state when the device enters the powerdown mode (see table 2). these outputs may be driven to 12v when disabled. all devices guarantee a 250kbps data rate for full load conditions (3k ? and 1000pf), v cc 3.0v, with one transmitter operating at full speed. under more typical conditions of v cc 3.3v, r l = 3k ? , and c l = 250pf, one transmitter easily operates at 1mbps. transmitter inputs float if left unconnected, and may cause i cc increases. connect unused inputs to gnd for the best performance. receivers all the icl32xx devices contain standard inverting receivers, but only the icl3238 and ICL3244 receivers can tristate, via the forceoff control line. additionally, the icl3238 and ICL3244 include a noninverting (monitor) receiver (denoted by the r outb label) that is always active, regardless of the state of any control lines. both receiver types convert rs-232 signals to cmos output levels and accept inputs up to 25v while presenting the required 3k ? to 7k ? input impedance (see figure 1) even if the power is off (v cc = 0v). the receivers? schmitt trigger input stage uses hysteresis to increase noise immunity and decrease errors due to slow input signal transitions. the icl3238 and ICL3244 inverting receivers disable during forced (manual) powerdown, but not during automatic powerdown (see table 2). conversely, the monitor receiver remains active even during manual powerdown making it extremely useful for ring indicator monitoring. standard receivers driving powered down peripherals must be disabled to prevent current flow through the peripheral?s protection diodes (see figures 2 and 3). this renders them useless for wake up functions, but the corresponding monitor receiver can be dedicated to this task as shown in figure 3. powerdown functionality this 3v family of rs-232 interface devices requires a nominal supply current of 0.3ma during normal operation r xout gnd v rout v cc 5k ? r xin -25v v rin +25v gnd v cc figure 1. inverting receiver connections figure 2. power drain through powered down peripheral old v cc powered gnd shdn = gnd v cc rx tx v cc current v out = v cc flow rs-232 chip down uart figure 3. disabled receivers prevent power drain icl3238/44 transition r x t x r2 outb r2 out t1 in forceoff = gnd v cc v cc to r2 in t1 out v out = hi-z powered detector down uart wake-up logic icl3224, icl3226, icl3238, ICL3244
8 (not in powerdown mode). this is considerably less than the 5ma to 11ma current required of 5v rs-232 devices. the already low current requirement drops significantly when the device enters powerdown mode. in powerdown, supply current drops to 1 a, because the on-chip charge pump turns off (v+ collapses to v cc , v- collapses to gnd), and the transmitter outputs tristate. inverting receiver outputs may or may not disable in powerdown; refer to table 2 for details. this micro-power mode makes these devices ideal for battery powered and portable applications. software controlled (manual) powerdown these devices allow the user to force the ic into the low power, standby state, and utilize a two pin approach where the forceon and forceoff inputs determine the ic?s mode. for always enabled operation, forceon and forceoff are both strapped high. to switch between active and powerdown modes, under logic or software control, only the forceoff input need be driven. the forceon state isn?t critical, as forceoff dominates over forceon. nevertheless, if strictly manual control over powerdown is desired, the user must strap forceon high to disable the enhanced automatic powerdown circuitry. icl3238 and ICL3244 inverting (standard) receiver outputs also disable when the device is in powerdown, thereby eliminating the possible current path through a shutdown peripheral?s input protection diode (see figures 2 and 3). connecting forceoff and forceon together disables the enhanced automatic powerdown feature, enabling them to function as a manual shutdown input (see figure 4). with any of the above control schemes, the time required to exit powerdown, and resume transmission is only 100 s. table 2. powerdown logic truth table rcvr or xmtr edge within 30 sec? forceoff input forceon input transmitter outputs receiver outputs (note 6) r outb outputs rs-232 level present at receiver input? invalid output mode of operation icl3224, icl3226 no h h active active n.a. no l normal operation (enhanced auto powerdown disabled) no h h active active n.a. yes h yes h l active active n.a. no l normal operation (enhanced auto powerdown enabled) yes h l active active n.a. yes h no h l high-z active n.a. no l powerdown due to enhanced auto powerdown logic no h l high-z active n.a. yes h x l x high-z active n.a. no l manual powerdown x l x high-z active n.a. yes h icl322x - invalid driving forceon and forceoff (emulates automatic powerdown) x note 7 note 7 active active n.a. yes h normal operation x note 7 note 7 high-z active n.a. no l forced auto powerdown icl3238, ICL3244 no h h active active active no l normal operation (enhanced auto powerdown disabled) no h h active active active yes h yes h l active active active no l normal operation (enhanced auto powerdown enabled) yes h l active active active yes h no h l high-z active active no l powerdown due to enhanced auto powerdown logic no h l high-z active active yes h x l x high-z high-z active no l manual powerdown x l x high-z high-z active yes h icl3238, ICL3244 - invalid driving forceon and forceoff (emulates automatic powerdown) x note 7 note 7 active active active yes h normal operation x note 7 note 7 high-z high-z active no l forced auto powerdown notes: 6. applies only to the icl3238 and ICL3244. 7. input is connected to invalid output. icl3224, icl3226, icl3238, ICL3244
9 when using both manual and enhanced automatic powerdown (forceon = 0), the icl32xx won?t power up from manual powerdown until both forceoff and forceon are driven high, or until a transition occurs on a receiver or transmitter input. figure 5 illustrates a circuit for ensuring that the icl32xx powers up as soon as forceoff switches high. the rising edge of the master powerdown signal forces the device to power up, and the icl32xx returns to enhanced automatic powerdown mode an rc time constant after this rising edge. the time constant isn?t critical, because the icl32xx remains powered up for 30 seconds after the forceon falling edge, even if there are no signal transitions. this gives slow-to-wake systems (e.g., a mouse) plenty of time to start transmitting, and as long as it starts transmitting within 30 seconds both systems remain enabled. invalid output the invalid output always indicates (see table 2) whether or not 30 s have elapsed with invalid rs-232 signals (see figures 6 and 8) persisting on all of the receiver inputs, giving the user an easy way to determine when the interface block should power down. invalid receiver levels occur whenever the driving peripheral?s outputs ar e shut off (powered down) or when the rs-232 interface cable is disconnected. in the case of a disconnected interface cable where all the receiver inputs are floating (but pulled to gnd by the internal receiver pull down resistors), the invalid logic detects the invalid levels and drives the output low. the power management logic then uses this indicator to power down the interface block. reconnecting the cable restores valid levels at the receiver inputs, invalid switches high, and the power management logic wakes up the interface block. invalid can also be used to indicate the dtr or ring indicator signal, as long as the other receiver inputs are floating, or driven to gnd (as in the case of a powered down driver). enhanced automatic powerdown even greater power savings is available by using these devices which feature an enhanced automatic powerdown function. when the enhanced powerdown logic determines that no transitions have occurred on any of the transmitter nor receiver inputs for 30 seconds, the charge pump and transmitters powerdown, thereby reducing supply current to 1 a. the icl32xx automatically powers back up whenever it detects a transition on one of these inputs. this automatic powerdown feature provides additional system power savings without changes to the existing operating system. enhanced automatic powerdown operates when the forceon input is low, and the forceoff input is high. tying forceon high disables automatic powerdown, but manual powerdown is always available via the overriding forceoff input. table 2 summarizes the enhanced automatic powerdown functionality. figure 7 illustrates the enhanced powerdown control logic. note that once the icl32xx enters powerdown (manually or automatically), the 30 second timer remains timed out (set), keeping the icl32xx powered down until forceon figure 4. connections for manual powerdown when no valid receiver signals are present pwr forceoff invalid cpu i/o forceon icl32xx mgt logic uart figure 5. circuit to ensure immediate power up when exiting forced powerdown forceoff forceon power master powerdown line 1m ? 0.1 f management unit icl32xx figure 6. definition of valid rs-232 receiver levels 0.3v -0.3v -2.7v 2.7v invalid level - invalid = 0 valid rs-232 level - invalid = 1 valid rs-232 level - invalid = 1 indeterminate indeterminate figure 7. enhanced automatic powerdown logic 30sec timer s r forceoff autoshdn forceon r_in t_in edge detect edge detect icl3224, icl3226, icl3238, ICL3244
10 transitions high, or until a transition occurs on a receiver or transmitter input. the invalid output signal switches low to indicate that invalid levels have persisted on all of the receiver inputs for more than 30 s (see figure 8), but this has no direct effect on the state of the icl32xx (see the next sections for methods of utilizing invalid to power down the device). invalid switches high 1 s after detecting a valid rs-232 level on a receiver input. invalid operates in all modes (forced or automatic powerdown, or forced on), so it is also useful for systems employing manual powerdown circuitry. the time to recover from automatic powerdown mode is typically 100 s. emulating standard automatic powerdown if enhanced automatic powerdown isn?t desired, the user can implement the standard automatic powerdown feature (mimics the function on the icl3221/23/43) by connecting the invalid output to the forceon and forceoff inputs, as shown in figure 9. after 30 s of invalid receiver levels, invalid switches low and drives the icl32xx into a forced powerdown condition. invalid switches high as soon as a receiver input senses a valid rs-232 level, forcing the icl32xx to power on. see the ?invalid driving forceon and forceoff ? section of table 2 for an operational summary. this operational mode is perfect for handheld devices that communicate with another computer via a detachable cable. detaching the cable allows the internal receiver pull-down resistors to pull the inputs to gnd (an invalid rs-232 level), causing the 30 s timer to time-out and drive the ic into powerdown. reconnecting the cable restores valid levels, causing the ic to power back up. hybrid automatic powerdown options for devices which communicate only through a detachable cable, connecting invalid to forceoff (with forceon = 0) may be a desirable configuration. while the cable is attached invalid and forceoff remain high, so the enhanced automatic powerdown logic powers down the rs- 232 device whenever there is 30 seconds of inactivity on the receiver and transmitter inputs. detaching the cable allows the receiver inputs to drop to an invalid level (gnd), so invalid switches low and forces the rs-232 device to power down. the icl32xx remains powered down until the cable is reconnected (invalid = forceoff = 1) and a transition occurs on a receiver or transmitter input (see figure 7). for immediate power up when the cable is receiver inputs transmitter outputs invalid output v+ v cc 0 v- t invl t invh figure 8. enhanced automatic powerdown, invalid and ready timing diagrams ready output transmitter inputs t wu t autopwdn t autopwdn t wu invalid region } figure 9. connections for automatic powerdown when no valid receiver signals are present forceoff invalid cpu i/o forceon icl32xx uart icl3224, icl3226, icl3238, ICL3244
11 reattached, connect forceon to forceoff through a network similar to that shown in figure 5. ready output (icl3224 and icl3226 only) the ready output indicates that the icl322x is ready to transmit. ready switches low whenever the device enters powerdown, and switches back high during power-up when v- reaches -4v or lower. capacitor selection the charge pumps require 0.1 f capacitors for 3.3v operation. for other supply voltages refer to table 3 for capacitor values. do not use values smaller than those listed in table 3. increasing the capacitor values (by a factor of 2) reduces ripple on the transmitter outputs and slightly reduces power consumption. c 2 , c 3 , and c 4 can be increased without increasing c 1 ?s value, however, do not increase c 1 without also increasing c 2 , c 3 , and c 4 to maintain the proper ratios (c 1 to the other capacitors). when using minimum required capacitor values, make sure that capacitor values do not degrade excessively with temperature. if in doubt, use capacitors with a larger nominal value. the capacitor?s equivalent series resistance (esr) usually rises at low temperatures and it influences the amount of ripple on v+ and v-. power supply decoupling in most circumstances a 0.1 f bypass capacitor is adequate. in applications that are particularly sensitive to power supply noise, decouple v cc to ground with a capacitor of the same value as the charge-pump capacitor c 1 . connect the bypass capacitor as close as possible to the ic. transmitter outputs when exiting powerdown figure 10 shows the response of two transmitter outputs when exiting powerdown mode. as they activate, the two transmitter outputs properly go to opposite rs-232 levels, with no glitching, ringing, nor undesirable transients. each transmitter is loaded with 3k ? in parallel with 2500pf. note that the transmitters enable only when the magnitude of the supplies exceed approximately 3v. operation down to 2.7v icl32xx transmitter outputs meet rs-562 levels ( 3.7v), at the full data rate, with v cc as low as 2.7v. rs-562 levels typically ensure interoperability with rs-232 devices. mouse driveability the ICL3244 is specifically designed to power a serial mouse while operating from low voltage supplies. figure 11 shows the transmitter output voltages under increasing load current. the on-chip switching regulator ensures the transmitters will supply at least 5v during worst case conditions (15ma for paralleled v+ transmitters, 7.3ma for single v- transmitter). high data rates the icl32xx maintain the rs-232 5v minimum transmitter output voltages even at high data rates. figure 12 details a transmitter loopback test circuit, and figure 13 illustrates the loopback test result at 120kbps. for this test, all transmitters were simultaneously driving rs-232 loads in parallel with 1000pf, at 120kbps. figure 14 shows the loopback results table 3. required capacitor values (note 8) v cc (v) c 1 ( f) c 2 , c 3 , c 4 ( f) 3.0 to 3.6 (3.3v 10%) 0.1 (0.22) 0.1 (0.22) 3.15 to 3.6 (3.3v 5%) (0.1) (0.1) 4.5 to 5.5 0.047 0.33 3.0 to 5.5 0.1 (0.22) 0.47 (1.0) note: 8. parenthesized values apply only to the icl3238 time (20 s/div.) t1 t2 2v/div 5v/div v cc = +3.3v forceoff figure 10. transmitter outputs when exiting powerdown c1 - c4 = 0.1 f 5v/div ready figure 11. transmitter output voltage vs load current (per transmitter, i.e., double current axis for total v out+ current) transmitter output voltage (v) load current per transmitter (ma) 0246810 -6 -4 -2 0 2 4 6 -5 -3 -1 1 3 5 13579 v out + v out - v cc v out + v out - t1 t2 t3 v cc = 3.0v ICL3244 icl3224, icl3226, icl3238, ICL3244
12 for a single transmitter driving 1000pf and an rs-232 load at 250kbps. the static transmitters were also loaded with an rs-232 receiver. interconnection with 3v and 5v logic the icl32xx directly interface with 5v cmos and ttl logic families. nevertheless, with the icl32xx at 3.3v, and the logic supply at 5v, ac, hc, and cd4000 outputs can drive icl32xx inputs, but icl32xx outputs do not reach the minimum v ih for these logic families. see table 4 for more information. figure 12. transmitter loopback test circuit figure 13. loopback test at 120kbps icl32xx v cc forceoff c 1 c 2 c 4 c 3 + + + + 1000pf v+ v- 5k t in r out c1+ c1- c2+ c2- r in t out + v cc 0.1 f v cc forceon t1 in t1 out r1 out 5 s/div. v cc = +3.3v 5v/div. c1 - c4 = 0.1 f figure 14. loopback test at 250kbps table 4. logic family compatibility with various supply voltages system power-supply voltage (v) v cc supply voltage (v) compatibility 3.3 3.3 compatible with all cmos families. 5 5 compatible with all ttl and cmos logic families. 5 3.3 compatible with act and hct cmos, and with ttl. icl32xx outputs are incompatible with ac, hc, and cd4000 cmos inputs. t1 in t1 out r1 out 2 s/div. 5v/div. v cc = +3.3v c1 - c4 = 0.1 f icl3224, icl3226, icl3238, ICL3244
13 typical performance curves v cc = 3.3v, t a = 25 o c figure 15. transmitter output voltage vs load capacitance figure 16. transmitter output voltage vs load capacitance figure 17. slew rate vs load capacitance figure 18. supply current vs load capacitance when transmitting data figure 19. supply current vs load capacitance when transmitting data figure 20. supply current vs load capacitance when transmitting data -6 -4 -2 0 2 4 6 1000 2000 3000 4000 5000 0 load capacitance (pf) transmitter output voltage (v) 1 transmitter at 250kbps v out + v out - other transmitters at 30kbps icl3224, icl3226, ICL3244 -6 -4 -2 0 2 4 6 1000 2000 3000 4000 5000 0 load capacitance (pf) transmitter output voltage (v) 1 transmitter at 250kbps v out + v out - other transmitters at 30kbps icl3238 load capacitance (pf) slew rate (v/ s) 0 1000 2000 3000 4000 5000 5 10 15 20 25 +slew -slew 5 10 15 20 25 40 30 35 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps icl3224 0 5 10 15 20 35 25 30 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps icl3226 20 25 30 35 40 55 45 50 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps icl3238 icl3224, icl3226, icl3238, ICL3244
14 die characteristics substrate potential (powered up): gnd transistor count: icl3224: 937 icl3226: 825 icl3238: 1235 ICL3244: 1109 process: si gate cmos figure 21. supply current vs load capacitance when transmitting data figure 22. supply current vs supply voltage typical performance curves v cc = 3.3v, t a = 25 o c (continued) 10 15 20 25 30 45 35 40 0 1000 2000 3000 4000 5000 load capacitance (pf) supply current (ma) 20kbps 250kbps 120kbps ICL3244 supply current (ma) 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0 0.5 1.0 1.5 2.0 supply voltage (v) 2.5 3.0 3.5 no load all outputs static icl3224, icl3226, icl3238, ICL3244
15 icl3224, icl3226, icl3238, ICL3244 dual-in-line plastic packages (pdip) notes: 1. controlling dimensions: inch. in case of conflict between english and metric dimensions, the inch dimensions control. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. symbols are defined in the ?mo series symbol list? in section 2.2 of publication no. 95. 4. dimensions a, a1 and l are m easured with the package seated in jedec seating plane gauge gs - 3. 5. d, d1, and e1 dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed 0.010 inch (0.25mm). 6. e and are measured with the leads constrained to be perpen- dicular to datum . 7. e b and e c are measured at the lead tips with the leads uncon- strained. e c must be zero or greater. 8. b1 maximum dimensions do not include dambar protrusions. dam- bar protrusions shall not exceed 0.010 inch (0.25mm). 9. n is the maximum number of terminal positions. 10. corner leads (1, n, n/2 and n/2 + 1) for e8.3, e16.3, e18.3, e28.3, e42.6 will have a b1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm). e a -c- c l e e a c e b e c -b- e1 index 12 3 n/2 n area seating base plane plane -c- d1 b1 b e d d1 a a2 l a1 -a- 0.010 (0.25) c a m bs e20.3 (jedec ms-001-ad issue d) 20 lead dual-in-line plastic package symbol inches millimeters notes min max min max a - 0.210 - 5.33 4 a1 0.015 - 0.39 - 4 a2 0.115 0.195 2.93 4.95 - b 0.014 0.022 0.356 0.558 - b1 0.045 0.070 1.55 1.77 8 c 0.008 0.014 0.204 0.355 - d 0.980 1.060 24.89 26.9 5 d1 0.005 - 0.13 - 5 e 0.300 0.325 7.62 8.25 6 e1 0.240 0.280 6.10 7.11 5 e 0.100 bsc 2.54 bsc - e a 0.300 bsc 7.62 bsc 6 e b - 0.430 - 10.92 7 l 0.115 0.150 2.93 3.81 4 n20 209 rev. 0 12/93
16 icl3224, icl3226, icl3238, ICL3244 small outline plastic packages (ssop) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include interl ead flash or protrusions. interlead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimen- sion at maximum material condition. 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m 0.25 0.010 gauge plane a2 m16.209 (jedec mo-150-ac issue b) 16 lead shrink small outline plastic package symbol inches millimeters notes minmaxminmax a - 0.078 - 2.00 - a1 0.002 - 0.05 - - a2 0.065 0.072 1.65 1.85 - b 0.009 0.014 0.22 0.38 9 c 0.004 0.009 0.09 0.25 - d 0.233 0.255 5.90 6.50 3 e 0.197 0.220 5.00 5.60 4 e 0.026 bsc 0.65 bsc - h 0.292 0.322 7.40 8.20 - l 0.022 0.037 0.55 0.95 6 n16 167 0 o 8 o 0 o 8 o - rev. 2 3/95
17 icl3224, icl3226, icl3238, ICL3244 shrink small outline plastic packages (ssop) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mo ld flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include interlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual in- dex feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dam bar protrusion. allowable dam- bar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimension at maximum material condition. 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m 0.25 0.010 gauge plane a2 m20.209 (jedec mo-150-ae issue b) 20 lead shrink small outline plastic package symbol inches millimeters notes min max min max a - 0.078 - 2.00 - a1 0.002 - 0.05 - - a2 0.065 0.072 1.65 1.85 - b 0.009 0.014 0.22 0.38 9 c 0.004 0.009 0.09 0.25 - d 0.272 0.295 6.90 7.50 3 e 0.197 0.220 5.00 5.60 4 e 0.026 bsc 0.65 bsc - h 0.292 0.322 7.40 8.20 - l 0.022 0.037 0.55 0.95 6 n20 207 0 o 8 o 0 o 8 o - rev. 2 4/95
18 icl3224, icl3226, icl3238, ICL3244 thin shrink small outline plastic packages (tssop) index area e1 d n 123 -b- 0.10(0.004) c a m bs e -a- b m -c- a1 a seating plane 0.10(0.004) c e 0.25(0.010) b m m l 0.25 0.010 gauge plane a2 notes: 1. these package dimensions are wit hin allowable dimensions of jedec mo-153-ae, issue e. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not include interlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimen- sion at maximum material condition. minimum space between protru- sion and adjacent lead is 0.07mm (0.0027 inch). 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exac t. (angles in degrees) 0.05(0.002) m28.173 28 lead thin shrink small outline plastic package symbol inches millimeters notes min max min max a - 0.047 - 1.20 - a1 0.002 0.006 0.05 0.15 - a2 0.031 0.051 0.80 1.05 - b 0.0075 0.0118 0.19 0.30 9 c 0.0035 0.0079 0.09 0.20 - d 0.378 0.386 9.60 9.80 3 e1 0.169 0.177 4.30 4.50 4 e 0.026 bsc 0.65 bsc - e 0.246 0.256 6.25 6.50 - l 0.0177 0.0295 0.45 0.75 6 n28 287 0 o 8 o 0 o 8 o - rev. 0 6/98
19 icl3224, icl3226, icl3238, ICL3244 small outline exposed pad plastic packages (epsoic) index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) h x 45 o c h 0.25(0.010) b m m p1 n 123 top view side view bottom view p m28.3b 28 lead wide body small outline exposed pad plastic package symbol inches notes min nominal max a 0.091 - 0.099 - a1 0.001 - 0.005 - b 0.014 - 0.019 9 c 0.0091 - 0.0125 - d 0.701 - 0.711 3 e 0.292 - 0.299 4 e 0.050 bsc - h 0.400 - 0.410 - h 0.010 - 0.016 5 l 0.024 - 0.040 6 n287 0 5 8 - p 0.180 0.214 0.218 11 p1 0.156 0.190 0.194 11 rev. 0 5/02 notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and toleranc ing per ansi y14.5m - 1982. 3. dimension ?d? does not include mold flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e? does not include in terlead flash or protrusions. interlead flash and protrusions shall not exceed 0.25mm (0.010 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual index feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. the lead width ?b?, as measured 0.36mm (0.014 inch) or greater above the seating plane, shall not exceed a maximum value of 0.61mm (0.024 inch) 10. controlling dimension: inch. 11. dimensions ?p? and ?p1? are thermal and/or electrical enhanced variations. values shown are maximum size of exposed pad within lead count body size.
20 all intersil u.s. products are manufactured, assembled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications can be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corporation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com icl3224, icl3226, icl3238, ICL3244 shrink small outline plastic packages (ssop) notes: 1. symbols are defined in the ?mo series symbol list? in section 2.2 of publication number 95. 2. dimensioning and tolerancing per ansi y14.5m - 1982. 3. dimension ?d? does not include mo ld flash, protrusions or gate burrs. mold flash, protrusion and gate burrs shall not exceed 0.20mm (0.0078 inch) per side. 4. dimension ?e? does not include interlead flash or protrusions. inter- lead flash and protrusions shall not exceed 0.20mm (0.0078 inch) per side. 5. the chamfer on the body is optional. if it is not present, a visual in- dex feature must be located within the crosshatched area. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.13mm (0.005 inch) total in excess of ?b? dimension at maximum material condition. 10. controlling dimension: millimeter. converted inch dimensions are not necessarily exact. index area e d n 123 -b- 0.25(0.010) c a m bs e -a- l b m -c- a1 a seating plane 0.10(0.004) c h 0.25(0.010) b m m 0.25 0.010 gauge plane a2 m28.209 (jedec mo-150-ah issue b) 28 lead shrink small outline plastic package symbol inches millimeters notes min max min max a - 0.078 - 2.00 - a1 0.002 - 0.05 - - a2 0.065 0.072 1.65 1.85 - b 0.009 0.014 0.22 0.38 9 c 0.004 0.009 0.09 0.25 - d 0.390 0.413 9.90 10.50 3 e 0.197 0.220 5.00 5.60 4 e 0.026 bsc 0.65 bsc - h 0.292 0.322 7.40 8.20 - l 0.022 0.037 0.55 0.95 6 n28 287 0 o 8 o 0 o 8 o - rev. 1 3/95

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